Understand the failure.
Verify the repair.
Small, reproducible software failures. The broken implementation, the fix that didn’t work, and the one that passed—preserved together.
Explore the cases ↓How results are verified ↗WHAT THE ARCHIVE CONTAINS
100840 executable cases. 20168 are open.
Every case records the implementation that fails, the fix that did not work, and the repair that passed its checks—with recorded outputs and source hashes. This release adds 100840 cases across 20168 failure mechanisms and 254 domains.
The open tier gives you the failure and the unsuccessful fix for one case in every mechanism. The remaining 80672 cases, 5 variants per mechanism, are member-only: the verified repair, its recorded checks, and the full fixture suite are held in the member archive. Read the methodology ↗
A RECORD OF WHAT WENT WRONG
Browse the archive / 100840
Pcm warmup lpc packet: warmup presentation · case 01
Literal warmup PCM samples are omitted from output.
Pcm warmup lpc packet: warmup presentation · case 02
Literal warmup PCM samples are omitted from output.
Pcm warmup lpc packet: warmup presentation · case 03
Literal warmup PCM samples are omitted from output.
Pcm warmup lpc packet: warmup presentation · case 04
Literal warmup PCM samples are omitted from output.
Pcm warmup lpc packet: warmup presentation · case 05
Literal warmup PCM samples are omitted from output.
Pcm warmup lpc packet: linear predictor · case 01
Second-order PCM prediction sums history rather than extrapolating slope.
Pcm warmup lpc packet: linear predictor · case 02
Second-order PCM prediction sums history rather than extrapolating slope.
Pcm warmup lpc packet: linear predictor · case 03
Second-order PCM prediction sums history rather than extrapolating slope.
Pcm warmup lpc packet: linear predictor · case 04
Second-order PCM prediction sums history rather than extrapolating slope.
Pcm warmup lpc packet: linear predictor · case 05
Second-order PCM prediction sums history rather than extrapolating slope.
Pcm warmup lpc packet: residual history · case 01
Warmup predictor later stores residuals instead of reconstructed amplitudes.
Pcm warmup lpc packet: residual history · case 02
Warmup predictor later stores residuals instead of reconstructed amplitudes.
Pcm warmup lpc packet: residual history · case 03
Warmup predictor later stores residuals instead of reconstructed amplitudes.
Pcm warmup lpc packet: residual history · case 04
Warmup predictor later stores residuals instead of reconstructed amplitudes.
Pcm warmup lpc packet: residual history · case 05
Warmup predictor later stores residuals instead of reconstructed amplitudes.
Pcm biphase mark payload: boundary transition · case 01
PCM line-code boundary checks the end of the bit cell rather than its first half.
Pcm biphase mark payload: boundary transition · case 02
PCM line-code boundary checks the end of the bit cell rather than its first half.
Pcm biphase mark payload: boundary transition · case 03
PCM line-code boundary checks the end of the bit cell rather than its first half.
Pcm biphase mark payload: boundary transition · case 04
PCM line-code boundary checks the end of the bit cell rather than its first half.
Pcm biphase mark payload: boundary transition · case 05
PCM line-code boundary checks the end of the bit cell rather than its first half.
Pcm biphase mark payload: midcell bit · case 01
Biphase PCM payload interprets midcell transition as zero.
Pcm biphase mark payload: midcell bit · case 02
Biphase PCM payload interprets midcell transition as zero.
Pcm biphase mark payload: midcell bit · case 03
Biphase PCM payload interprets midcell transition as zero.
Pcm biphase mark payload: midcell bit · case 04
Biphase PCM payload interprets midcell transition as zero.
Pcm biphase mark payload: midcell bit · case 05
Biphase PCM payload interprets midcell transition as zero.
Pcm biphase mark payload: line state · case 01
Decoder tracks first-half level instead of final cell level.
Pcm biphase mark payload: line state · case 02
Decoder tracks first-half level instead of final cell level.
Pcm biphase mark payload: line state · case 03
Decoder tracks first-half level instead of final cell level.
Pcm biphase mark payload: line state · case 04
Decoder tracks first-half level instead of final cell level.
Pcm biphase mark payload: line state · case 05
Decoder tracks first-half level instead of final cell level.
Pcm biphase mark payload: validity output · case 01
PCM payload value is confused with line-code validity.
Pcm biphase mark payload: validity output · case 02
PCM payload value is confused with line-code validity.
Pcm biphase mark payload: validity output · case 03
PCM payload value is confused with line-code validity.
Pcm biphase mark payload: validity output · case 04
PCM payload value is confused with line-code validity.
Pcm biphase mark payload: validity output · case 05
PCM payload value is confused with line-code validity.
Pcm biphase mark payload: continuation level · case 01
Biphase continuation returns obsolete packet start level.
Pcm biphase mark payload: continuation level · case 02
Biphase continuation returns obsolete packet start level.
Pcm biphase mark payload: continuation level · case 03
Biphase continuation returns obsolete packet start level.
Pcm biphase mark payload: continuation level · case 04
Biphase continuation returns obsolete packet start level.
Pcm biphase mark payload: continuation level · case 05
Biphase continuation returns obsolete packet start level.
Pcm biphase mark generation: mandatory boundary · case 01
PCM line encoder omits mandatory bit-cell boundary transitions.
Pcm biphase mark generation: mandatory boundary · case 02
PCM line encoder omits mandatory bit-cell boundary transitions.
Pcm biphase mark generation: mandatory boundary · case 03
PCM line encoder omits mandatory bit-cell boundary transitions.
Pcm biphase mark generation: mandatory boundary · case 04
PCM line encoder omits mandatory bit-cell boundary transitions.
Pcm biphase mark generation: mandatory boundary · case 05
PCM line encoder omits mandatory bit-cell boundary transitions.
Pcm biphase mark generation: payload transition · case 01
Payload transition convention is inverted.
Pcm biphase mark generation: payload transition · case 02
Payload transition convention is inverted.
Pcm biphase mark generation: payload transition · case 03
Payload transition convention is inverted.
Pcm biphase mark generation: payload transition · case 04
Payload transition convention is inverted.
Pcm biphase mark generation: payload transition · case 05
Payload transition convention is inverted.
Pcm biphase mark generation: halfcell order · case 01
PCM wire half-cells are transmitted in reverse temporal order.
Pcm biphase mark generation: halfcell order · case 02
PCM wire half-cells are transmitted in reverse temporal order.
Pcm biphase mark generation: halfcell order · case 03
PCM wire half-cells are transmitted in reverse temporal order.
Pcm biphase mark generation: halfcell order · case 04
PCM wire half-cells are transmitted in reverse temporal order.
Pcm biphase mark generation: halfcell order · case 05
PCM wire half-cells are transmitted in reverse temporal order.
Pcm biphase mark generation: previous cell state · case 01
Encoder phase state tracks the wrong half-cell.
Pcm biphase mark generation: previous cell state · case 02
Encoder phase state tracks the wrong half-cell.
Pcm biphase mark generation: previous cell state · case 03
Encoder phase state tracks the wrong half-cell.
Pcm biphase mark generation: previous cell state · case 04
Encoder phase state tracks the wrong half-cell.
Pcm biphase mark generation: previous cell state · case 05
Encoder phase state tracks the wrong half-cell.
Pcm biphase mark generation: final level · case 01
Continuation phase is reset between PCM transport packets.
Pcm biphase mark generation: final level · case 02
Continuation phase is reset between PCM transport packets.
Pcm biphase mark generation: final level · case 03
Continuation phase is reset between PCM transport packets.
Pcm biphase mark generation: final level · case 04
Continuation phase is reset between PCM transport packets.
Pcm biphase mark generation: final level · case 05
Continuation phase is reset between PCM transport packets.
Pcm common trailing zero shift: silence block canonical · case 01
An all-zero PCM block advertises arbitrary maximum wasted precision instead of canonical zero shift.
Pcm common trailing zero shift: silence block canonical · case 02
An all-zero PCM block advertises arbitrary maximum wasted precision instead of canonical zero shift.
Pcm common trailing zero shift: silence block canonical · case 03
An all-zero PCM block advertises arbitrary maximum wasted precision instead of canonical zero shift.
Pcm common trailing zero shift: silence block canonical · case 04
An all-zero PCM block advertises arbitrary maximum wasted precision instead of canonical zero shift.
Pcm common trailing zero shift: silence block canonical · case 05
An all-zero PCM block advertises arbitrary maximum wasted precision instead of canonical zero shift.
Pcm common trailing zero shift: shared divisibility · case 01
One divisible PCM sample permits destructive shifting of another sample.
Pcm common trailing zero shift: shared divisibility · case 02
One divisible PCM sample permits destructive shifting of another sample.
Pcm common trailing zero shift: shared divisibility · case 03
One divisible PCM sample permits destructive shifting of another sample.
Pcm common trailing zero shift: shared divisibility · case 04
One divisible PCM sample permits destructive shifting of another sample.
Pcm common trailing zero shift: shared divisibility · case 05
One divisible PCM sample permits destructive shifting of another sample.
Pcm common trailing zero shift: shift cap · case 01
Wasted-bit field exceeds its declared maximum.
Pcm common trailing zero shift: shift cap · case 02
Wasted-bit field exceeds its declared maximum.
Pcm common trailing zero shift: shift cap · case 03
Wasted-bit field exceeds its declared maximum.
Pcm common trailing zero shift: shift cap · case 04
Wasted-bit field exceeds its declared maximum.
Pcm common trailing zero shift: shift cap · case 05
Wasted-bit field exceeds its declared maximum.
Pcm common trailing zero shift: signed coarse · case 01
Removing common zero bits drops PCM polarity.
Pcm common trailing zero shift: signed coarse · case 02
Removing common zero bits drops PCM polarity.
Pcm common trailing zero shift: signed coarse · case 03
Removing common zero bits drops PCM polarity.
Pcm common trailing zero shift: signed coarse · case 04
Removing common zero bits drops PCM polarity.
Pcm common trailing zero shift: signed coarse · case 05
Removing common zero bits drops PCM polarity.
Pcm common trailing zero shift: nonzero filter · case 01
Negative samples do not constrain common wasted-bit selection.
Pcm common trailing zero shift: nonzero filter · case 02
Negative samples do not constrain common wasted-bit selection.
Pcm common trailing zero shift: nonzero filter · case 03
Negative samples do not constrain common wasted-bit selection.
Pcm common trailing zero shift: nonzero filter · case 04
Negative samples do not constrain common wasted-bit selection.
Pcm common trailing zero shift: nonzero filter · case 05
Negative samples do not constrain common wasted-bit selection.
Pcm channel lifting chain: anchor channel · case 01
Reversible interchannel PCM coding loses its literal first-channel anchor.
Pcm channel lifting chain: anchor channel · case 02
Reversible interchannel PCM coding loses its literal first-channel anchor.
Pcm channel lifting chain: anchor channel · case 03
Reversible interchannel PCM coding loses its literal first-channel anchor.
Pcm channel lifting chain: anchor channel · case 04
Reversible interchannel PCM coding loses its literal first-channel anchor.
Pcm channel lifting chain: anchor channel · case 05
Reversible interchannel PCM coding loses its literal first-channel anchor.
Pcm channel lifting chain: residual reference · case 01
Adjacent-channel lifting always references first channel instead of its immediate predecessor.
Pcm channel lifting chain: residual reference · case 02
Adjacent-channel lifting always references first channel instead of its immediate predecessor.
Pcm channel lifting chain: residual reference · case 03
Adjacent-channel lifting always references first channel instead of its immediate predecessor.
Pcm channel lifting chain: residual reference · case 04
Adjacent-channel lifting always references first channel instead of its immediate predecessor.
Pcm channel lifting chain: residual reference · case 05
Adjacent-channel lifting always references first channel instead of its immediate predecessor.
INSPECTABLE BY DESIGN
Every result has a runnable source.
Runnable implementations with recorded outputs, source hashes, and explicit contracts. Related variants share a failure mechanism and belong together in evaluation splits.
Read the methodology ↗