FA-92034 / PLC ladder logic scan cycles / Member archive

Power cycle clears latched OTL bits · case 04

A latched mode or fault memory is lost after a controller power cycle.

Member previewVariant 4 · 3 implementations · 8 checks per implementation

Case contract

Latch (OTL), unlatch (OTU) and non-retentive output (OTE) rungs executed in program order each scan. rungs is a list of [instr, bit, condition_tag]; the rung is true when the condition input is true, or, for condition S:FS, on the first scan after power-up. A scan item {"power_cycle": true} models a power cycle: prescan clears only OTE destination bits, OTL/OTU bits are retentive, and the next scan is a first scan; it also reports the post-prescan state. OTL sets and OTU clears its bit only when its rung is true; the later rung wins. Return the sorted true bits after each item.

Why this case matters

Ladder programs are executed as repeated scans; each defect here changes what a rung, timer, counter or data-table instruction reports on a particular scan, which is how commissioning and field faults are actually observed.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
regression: scenario 1	`[["B:0", "B:2"], ["B:0", "B:3"], ["B:0", "B:2", "B:3"], [], []]`	`[["B:0", "B:2"], ["B:0", "B:3"], ["B:0", "B:2", "B:3"], ["B:0", "B:3"], ["B:0", "B:3"]]`	Failed

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