FAILURE MAP
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FA-89836 / Instruction set emulation / Open access

Disabled SRAM still decoded · case 01

With SRAM disabled, reads of 0x6000-0x7FFF return memory contents instead of open bus.

Verified by executionVariant 1 · 9 checks per implementationDownload source bundle ↓JSON ↗

ROOT CAUSE

The SRAM window ignores the enable.

THE FAILURE

The SRAM window ignores the enable.

Unsuccessful approach: Decoding disabled SRAM for reads still returns stored bytes instead of open bus.

Case contract

Input [rom_size, sram_enabled, ops] with ops ['r', addr] or ['w', addr, value] on a 16-bit bus. 0x0000-0x1FFF: 2 KiB RAM mirrored every 0x800. 0x2000-0x3FFF: 8 video registers mirrored every 8 bytes. 0x4000-0x4017: I/O registers. 0x4018-0x5FFF: unmapped. 0x6000-0x7FFF: SRAM when enabled, else unmapped. 0x8000-0xFFFF: ROM of rom_size bytes mirrored to fill the window, byte at offset o = (7o + (o >> 8) + 3) & 0xFF, writes ignored. Every write drives its value onto the data bus; reads of unmapped space return the last bus value, other reads drive the bus. Unwritten RAM/register/SRAM bytes read 0. Writes yield None, reads the value.

Why this case matters

Console and microcontroller emulators depend on exact address decoding; mirroring and open-bus behaviour are relied on by real software.

1 / The failure

Exit 1
"""Failure Map reference implementation. Python standard library only."""
import json

N = 1
observations = []
def solve(*args):
    rom_size, sram_en, ops = args
    ram, ppu, io, sram = {}, {}, {}, {}
    bus = 0
    out = []
    for op in ops:
        kind, addr = op[0], op[1] & 0xFFFF
        if addr < 0x2000: dev, key = ram, addr & 0x7FF
        elif addr < 0x4000: dev, key = ppu, addr & 7
        elif addr < 0x4018: dev, key = io, addr
        elif addr < 0x6000: dev, key = None, None
        elif addr < 0x8000: dev, key = sram, addr - 0x6000
        else: dev, key = 'rom', (addr - 0x8000) % rom_size
        if kind == 'w':
            bus = op[2] & 0xFF
            if dev is not None and dev != 'rom':
                dev[key] = bus
            out.append(None)
        else:
            if dev == 'rom': bus = (key * 7 + (key >> 8) + 3) & 0xFF
            elif dev is not None: bus = dev.get(key, 0)
            out.append(bus)
    return out
def check(label, actual, expected):
    observations.append({"check": label, "actual": actual, "expected": expected, "passed": actual == expected})
fixtures = [[('ram mirrors', [32768, 1, [['w', 2049, 67], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 67, 67, 67]), ('video register mirrors', [32768, 1, [['w', 8201, 5], ['r', 16377], ['r', 8193]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 17], ['r', 16640]]], [None, 119, None, 17]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17665]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49158], ['r', 32774]]], [45, 45]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49158]]], [102, None, 109]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 152], ['r', 24576], ['r', 24577]]], [None, 152, 152]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 68], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 68, 68, 68]), ('video register mirrors', [32768, 1, [['w', 8202, 5], ['r', 16378], ['r', 8194]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 18], ['r', 16640]]], [None, 119, None, 18]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17666]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49159], ['r', 32775]]], [52, 52]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49159]]], [102, None, 116]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 151], ['r', 24576], ['r', 24577]]], [None, 151, 151]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 69], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 69, 69, 69]), ('video register mirrors', [32768, 1, [['w', 8203, 5], ['r', 16379], ['r', 8195]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 19], ['r', 16640]]], [None, 119, None, 19]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17667]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49160], ['r', 32776]]], [59, 59]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49160]]], [102, None, 123]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 150], ['r', 24576], ['r', 24577]]], [None, 150, 150]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 70], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 70, 70, 70]), ('video register mirrors', [32768, 1, [['w', 8204, 5], ['r', 16380], ['r', 8196]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 20], ['r', 16640]]], [None, 119, None, 20]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17668]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49161], ['r', 32777]]], [66, 66]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49161]]], [102, None, 130]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 149], ['r', 24576], ['r', 24577]]], [None, 149, 149]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 71], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 71, 71, 71]), ('video register mirrors', [32768, 1, [['w', 8205, 5], ['r', 16381], ['r', 8197]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 21], ['r', 16640]]], [None, 119, None, 21]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17669]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49162], ['r', 32778]]], [73, 73]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49162]]], [102, None, 137]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 148], ['r', 24576], ['r', 24577]]], [None, 148, 148]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])]]
for label, args, expected in fixtures[N-1]:
    check(label, solve(*args), expected)
print(json.dumps({"observations": observations, "passed": all(x["passed"] for x in observations)}, ensure_ascii=False))
raise SystemExit(0 if all(x["passed"] for x in observations) else 1)
Boundary fixtureActualExpectedOutcome
ram mirrors[None, 67, 67, 67][None, 67, 67, 67]Passed
video register mirrors[None, 5, 5][None, 5, 5]Passed
open bus after unmapped write[None, 119, None, 17][None, 119, None, 17]Passed
open bus after read[24, 24][24, 24]Passed
small rom mirrors[45, 45][45, 45]Passed
large rom does not mirror[102, None, 109][102, None, 109]Passed
io registers[None, 15, 0][None, 15, 0]Passed
disabled sram is open bus[None, 0, 0][None, 152, 152]Failed
enabled sram[None, 18, 0][None, 18, 0]Passed

SHA-256 / 613e5bc4b5d722fb9feeb88312e50509e5dd0c48a5def3091790f74fce1009a7

2 / The unsuccessful fix

Exit 1
"""Failure Map reference implementation. Python standard library only."""
import json

N = 1
observations = []
def solve(*args):
    rom_size, sram_en, ops = args
    ram, ppu, io, sram = {}, {}, {}, {}
    bus = 0
    out = []
    for op in ops:
        kind, addr = op[0], op[1] & 0xFFFF
        if addr < 0x2000: dev, key = ram, addr & 0x7FF
        elif addr < 0x4000: dev, key = ppu, addr & 7
        elif addr < 0x4018: dev, key = io, addr
        elif addr < 0x6000: dev, key = None, None
        elif addr < 0x8000: dev, key = (sram, addr - 0x6000) if sram_en or kind == 'r' else (None, None)
        else: dev, key = 'rom', (addr - 0x8000) % rom_size
        if kind == 'w':
            bus = op[2] & 0xFF
            if dev is not None and dev != 'rom':
                dev[key] = bus
            out.append(None)
        else:
            if dev == 'rom': bus = (key * 7 + (key >> 8) + 3) & 0xFF
            elif dev is not None: bus = dev.get(key, 0)
            out.append(bus)
    return out
def check(label, actual, expected):
    observations.append({"check": label, "actual": actual, "expected": expected, "passed": actual == expected})
fixtures = [[('ram mirrors', [32768, 1, [['w', 2049, 67], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 67, 67, 67]), ('video register mirrors', [32768, 1, [['w', 8201, 5], ['r', 16377], ['r', 8193]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 17], ['r', 16640]]], [None, 119, None, 17]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17665]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49158], ['r', 32774]]], [45, 45]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49158]]], [102, None, 109]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 152], ['r', 24576], ['r', 24577]]], [None, 152, 152]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 68], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 68, 68, 68]), ('video register mirrors', [32768, 1, [['w', 8202, 5], ['r', 16378], ['r', 8194]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 18], ['r', 16640]]], [None, 119, None, 18]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17666]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49159], ['r', 32775]]], [52, 52]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49159]]], [102, None, 116]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 151], ['r', 24576], ['r', 24577]]], [None, 151, 151]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 69], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 69, 69, 69]), ('video register mirrors', [32768, 1, [['w', 8203, 5], ['r', 16379], ['r', 8195]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 19], ['r', 16640]]], [None, 119, None, 19]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17667]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49160], ['r', 32776]]], [59, 59]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49160]]], [102, None, 123]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 150], ['r', 24576], ['r', 24577]]], [None, 150, 150]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 70], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 70, 70, 70]), ('video register mirrors', [32768, 1, [['w', 8204, 5], ['r', 16380], ['r', 8196]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 20], ['r', 16640]]], [None, 119, None, 20]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17668]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49161], ['r', 32777]]], [66, 66]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49161]]], [102, None, 130]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 149], ['r', 24576], ['r', 24577]]], [None, 149, 149]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 71], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 71, 71, 71]), ('video register mirrors', [32768, 1, [['w', 8205, 5], ['r', 16381], ['r', 8197]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 21], ['r', 16640]]], [None, 119, None, 21]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17669]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49162], ['r', 32778]]], [73, 73]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49162]]], [102, None, 137]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 148], ['r', 24576], ['r', 24577]]], [None, 148, 148]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])]]
for label, args, expected in fixtures[N-1]:
    check(label, solve(*args), expected)
print(json.dumps({"observations": observations, "passed": all(x["passed"] for x in observations)}, ensure_ascii=False))
raise SystemExit(0 if all(x["passed"] for x in observations) else 1)
Boundary fixtureActualExpectedOutcome
ram mirrors[None, 67, 67, 67][None, 67, 67, 67]Passed
video register mirrors[None, 5, 5][None, 5, 5]Passed
open bus after unmapped write[None, 119, None, 17][None, 119, None, 17]Passed
open bus after read[24, 24][24, 24]Passed
small rom mirrors[45, 45][45, 45]Passed
large rom does not mirror[102, None, 109][102, None, 109]Passed
io registers[None, 15, 0][None, 15, 0]Passed
disabled sram is open bus[None, 0, 0][None, 152, 152]Failed
enabled sram[None, 18, 0][None, 18, 0]Passed

SHA-256 / 3a144107dd10faedc519540060da93421c96b80aae02583c890c28632f9441bf

HELD IN THE MEMBER ARCHIVE

The verified repair and its recorded checks are member-only.

This mechanism has 9 recorded checks per implementation. The open-access tier publishes the failure and the unsuccessful fix; the repaired source that passes every check, and the observations that prove it, are available to members.

Every case sharing this mechanism uses the same contract and the same repair, so this one record is held back for all of them.

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Verification & scope

A deterministic bounded teaching model of one emulator rule; the instruction semantics are a stipulated contract inspired by common ISAs and are not a claim of cycle-exact or architectural conformance. This reproducer isolates one failure mechanism. Results cover the supplied fixtures. Variants within a family share a test contract and should remain grouped when constructing evaluation splits. Related mechanisms with a shared evaluation_group must also remain together; these controlled models are not independent production incidents.

Observations recorded using Python 3.12.14 at 2026-09-29T14:51:21.151691+00:00.

Case digest / 6b6c603ccfacc4f693cd82665ed705b815f98f3ac0d6643ce93fdab6f272ee9d