FA-89668 / Instruction set emulation / Member archive

DEC overflow flagged one step late · case 03

PV is set when decrementing 0x81 to 0x80 instead of 0x80 to 0x7F.

Member previewVariant 3 · 3 implementations · 9 checks per implementation

Case contract

Input [a, ops]; ops are 'inc', 'dec', ['add', v], ['sub', v] on 8-bit A; carry starts 0. After each op report [A, S, Z, H, PV, N, C]. inc: H = carry out of bit 3, PV = (A was 0x7F), N = 0, C unchanged. dec: H = borrow from bit 4 (low nibble was 0), PV = (A was 0x80), N = 1, C unchanged. add: H = carry out of bit 3, PV = signed overflow, N = 0, C = carry out. sub: H = borrow into bit 4 (low nibble of A < low nibble of v), PV = signed overflow, N = 1, C = borrow.

Why this case matters

Half-carry and parity/overflow flags are observable through DAA and conditional branches; emulators often get the INC/DEC special cases wrong.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
dec out of sign overflow	`[[128, 1, 0, 0, 1, 1, 0], [127, 0, 0, 1, 0, 1, 0], [126, 0, 0, 0, 0, 1, 0]]`	`[[128, 1, 0, 0, 0, 1, 0], [127, 0, 0, 1, 1, 1, 0], [126, 0, 0, 0, 0, 1, 0]]`	Failed

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