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NMI treated as level triggered · case 04

Holding the NMI line high re-enters the NMI handler on every step.

Member previewVariant 4 · 3 implementations · 7 checks per implementation

Case contract

Input [pc, i, steps] with steps [irq, nmi, instr]. Each step: an NMI 0->1 edge (the line starts low) is taken first; otherwise a high IRQ line is taken when the I flag is 0; otherwise the instruction runs (nop/cli/sei advance pc by 1, rti pops I then pc if the stack is non-empty). Taking an interrupt pushes pc then I, sets I=1 and jumps to 0x9000 (NMI) or 0x8000 (IRQ). The NMI edge detector samples the line every step. Return [event, pc, I] per step.

Why this case matters

Interrupt controllers in CPU emulators must separate edge- and level-triggered sources, masking and nesting to reproduce handler timing.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixtureActualExpectedOutcome
nmi is edge triggered[["nmi", 36864, 1], ["nmi", 36864, 1], ["nmi", 36864, 1], ["nop", 36865, 1], ["nmi", 36864, 1]][["nmi", 36864, 1], ["nop", 36865, 1], ["rti", 512, 1], ["nop", 513, 1], ["nmi", 36864, 1]]Failed

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This record includes three runnable implementations, regression fixtures, execution results, and source hashes.

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