FA-89509 / Instruction set emulation / Member archive

All accesses require word alignment · case 04

Byte and halfword accesses at legal unaligned addresses trap.

Member previewVariant 4 · 3 implementations · 8 checks per implementation

Case contract

Input [mem, ops]: mem is a byte list; ops [op, addr, value] with lb/lbu/lh/lhu/lw loads and sb/sh/sw stores (sizes 1/2/4). An access whose address is not a multiple of its size yields 'misaligned' (checked first); one extending past memory yields 'fault'. Data is little-endian. lb/lh/lw sign-extend from their top bit, lbu/lhu zero-extend. Stores write the low size bytes of value and yield None. Return [results, final memory].

Why this case matters

Memory access emulation must reproduce endianness, extension and alignment traps bit-exactly.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
signed byte load	`[[-124, "misaligned"], [132, 127, 254, 255, 1, 128, 52, 18, 0, 0, 0, 0]]`	`[[-124, 127], [132, 127, 254, 255, 1, 128, 52, 18, 0, 0, 0, 0]]`	Failed

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