FA-89478 / Instruction set emulation / Member archive

Unsigned remainder by zero yields zero · case 03

remu by zero returns 0 instead of the dividend.

Member previewVariant 3 · 3 implementations · 11 checks per implementation

Case contract

Input [op, a, b] with a, b as unsigned 32-bit register values. div/rem interpret them as signed; quotient truncates toward zero and the remainder takes the dividend's sign; division by zero gives quotient all ones (0xFFFFFFFF) and remainder = dividend; the overflow case -2^31 / -1 gives -2^31 with remainder 0. divu/remu are unsigned; divu by zero gives 0xFFFFFFFF and remu by zero gives the dividend. Results are returned as unsigned 32-bit values.

Why this case matters

ISA emulators must reproduce defined results for division corner cases that host languages treat differently or trap on.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
unsigned remainder by zero	`0`	`2147483651`	Failed

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