FA-53017 / Raster memory layout / Member archive

Virtual Texture Gutter Atlas: Interior row uses tile width instead of atlas pitch or transposes axes · case 02

The returned physical layout descriptor disagrees with the declared buffer mapping at address.

Member previewVariant 2 · 3 implementations · 6 checks per implementation

Case contract

A 4x4 virtual tile occupies a 6x6 atlas cell, including one replicated texel on every side. Physical cell IDs come from a remap; atlas width is five cells. Input requests an interior texel, and output includes four border-copy addresses. Return the named intermediate layout descriptor and final address fields; all quantities are integer byte offsets unless explicitly stated.

Why this case matters

Offline raster resource, upload, readback, and storage-layout regression model.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
layout fixture 1	`{"address": 721, "bottom_border": 1057, "cell": 7, "cell_origin": 598, "cell_xy": [2, 1], "interior_origin": 691, "left_border": 868, "right_border": 883, "row_pitch": 90, "top_border": 607}`	`{"address": 877, "bottom_border": 1057, "cell": 7, "cell_origin": 598, "cell_xy": [2, 1], "interior_origin": 691, "left_border": 868, "right_border": 883, "row_pitch": 90, "top_border": 607}`	Failed

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This record includes three runnable implementations, regression fixtures, execution results, and source hashes.

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