FA-52533 / Raster memory layout / Member archive

Pixel Interleaved Sample Banks: Edge bank validity includes padded pixel or counts pixels as samples · case 03

The returned physical layout descriptor disagrees with the declared buffer mapping at valid_lanes.

Member previewVariant 3 · 3 implementations · 6 checks per implementation

Case contract

A toy 4-sample image stores samples in lane order [2,0,3,1]. Two adjacent pixels share a bank record with a three-byte bank tag; rows contain complete banks even for odd width. Return the named intermediate layout descriptor and final address fields; all quantities are integer byte offsets unless explicitly stated.

Why this case matters

Offline raster resource, upload, readback, and storage-layout regression model.

One recorded failure

Sample boundary fixture

This sample comes from the broken implementation of a controlled reproducer.

Boundary fixture	Actual	Expected	Outcome
layout fixture 1	`{"address": 40, "allocation_end": 68, "bank_columns": 1, "bank_index": 0, "bank_pitch": 35, "bank_start": 33, "lane": 1, "pixel_lane": 0, "sample_slot": 1, "valid_lanes": 8}`	`{"address": 40, "allocation_end": 68, "bank_columns": 1, "bank_index": 0, "bank_pitch": 35, "bank_start": 33, "lane": 1, "pixel_lane": 0, "sample_slot": 1, "valid_lanes": 4}`	Failed

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