FA-16544 / Floating-point arithmetic / Member archive
NaN addition lets a quiet left operand hide a signaling right operand · case 04
NaN addition lets a quiet left operand hide a signaling right operand.
Case contract
Stipulated binary64 addition policy: propagate first signaling NaN, otherwise largest quiet-NaN diagnostic payload (left wins ties); quiet propagated NaNs preserving sign. Opposite infinities produce canonical quiet NaN. Finite values use Python binary64 addition. Return bits and invalid flag.
Why this case matters
An offline floating representation model isolates a reproducible arithmetic fault.
One recorded failure
Sample boundary fixtureThis sample comes from the broken implementation of a controlled reproducer.
| Boundary fixture | Actual | Expected | Outcome |
|---|---|---|---|
| signaling precedence | [9221120237041090660, true] | [9221120237041090564, true] | Failed |
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