{"abstract":"Reads from 0xC000 upward return bytes past the end of a 16 KiB ROM.","category":"Instruction set emulation","checks":9,"contract":"Input [rom_size, sram_enabled, ops] with ops ['r', addr] or ['w', addr, value] on a 16-bit bus. 0x0000-0x1FFF: 2 KiB RAM mirrored every 0x800. 0x2000-0x3FFF: 8 video registers mirrored every 8 bytes. 0x4000-0x4017: I/O registers. 0x4018-0x5FFF: unmapped. 0x6000-0x7FFF: SRAM when enabled, else unmapped. 0x8000-0xFFFF: ROM of rom_size bytes mirrored to fill the window, byte at offset o = (7o + (o >> 8) + 3) & 0xFF, writes ignored. Every write drives its value onto the data bus; reads of unmapped space return the last bus value, other reads drive the bus. Unwritten RAM/register/SRAM bytes read 0. Writes yield None, reads the value.","evaluation_group":"w2-instruction-set-emulation-bus-decode","failed_approach":"Always mirroring at 16 KiB breaks 32 KiB ROMs.","family":"w2-instruction-set-emulation-bus-decode-rom-mirroring","id":"FA-89826","implementations":{"attempt":{"sha256":"c52fb813e5a574abea4b9e2204bf70c390357c5667f139dce3ecdf1280f6e7c0","source":"\"\"\"Failure Map reference implementation. Python standard library only.\"\"\"\nimport json\n\nN = 1\nobservations = []\ndef solve(*args):\n    rom_size, sram_en, ops = args\n    ram, ppu, io, sram = {}, {}, {}, {}\n    bus = 0\n    out = []\n    for op in ops:\n        kind, addr = op[0], op[1] & 0xFFFF\n        if addr < 0x2000: dev, key = ram, addr & 0x7FF\n        elif addr < 0x4000: dev, key = ppu, addr & 7\n        elif addr < 0x4018: dev, key = io, addr\n        elif addr < 0x6000: dev, key = None, None\n        elif addr < 0x8000: dev, key = (sram, addr - 0x6000) if sram_en else (None, None)\n        else: dev, key = 'rom', (addr - 0x8000) % 0x4000\n        if kind == 'w':\n            bus = op[2] & 0xFF\n            if dev is not None and dev != 'rom':\n                dev[key] = bus\n            out.append(None)\n        else:\n            if dev == 'rom': bus = (key * 7 + (key >> 8) + 3) & 0xFF\n            elif dev is not None: bus = dev.get(key, 0)\n            out.append(bus)\n    return out\ndef check(label, actual, expected):\n    observations.append({\"check\": label, \"actual\": actual, \"expected\": expected, \"passed\": actual == expected})\nfixtures = [[('ram mirrors', [32768, 1, [['w', 2049, 67], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 67, 67, 67]), ('video register mirrors', [32768, 1, [['w', 8201, 5], ['r', 16377], ['r', 8193]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 17], ['r', 16640]]], [None, 119, None, 17]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17665]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49158], ['r', 32774]]], [45, 45]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49158]]], [102, None, 109]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 152], ['r', 24576], ['r', 24577]]], [None, 152, 152]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 68], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 68, 68, 68]), ('video register mirrors', [32768, 1, [['w', 8202, 5], ['r', 16378], ['r', 8194]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 18], ['r', 16640]]], [None, 119, None, 18]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17666]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49159], ['r', 32775]]], [52, 52]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49159]]], [102, None, 116]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 151], ['r', 24576], ['r', 24577]]], [None, 151, 151]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 69], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 69, 69, 69]), ('video register mirrors', [32768, 1, [['w', 8203, 5], ['r', 16379], ['r', 8195]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 19], ['r', 16640]]], [None, 119, None, 19]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17667]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49160], ['r', 32776]]], [59, 59]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49160]]], [102, None, 123]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 150], ['r', 24576], ['r', 24577]]], [None, 150, 150]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 70], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 70, 70, 70]), ('video register mirrors', [32768, 1, [['w', 8204, 5], ['r', 16380], ['r', 8196]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 20], ['r', 16640]]], [None, 119, None, 20]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17668]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49161], ['r', 32777]]], [66, 66]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49161]]], [102, None, 130]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 149], ['r', 24576], ['r', 24577]]], [None, 149, 149]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 71], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 71, 71, 71]), ('video register mirrors', [32768, 1, [['w', 8205, 5], ['r', 16381], ['r', 8197]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 21], ['r', 16640]]], [None, 119, None, 21]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17669]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49162], ['r', 32778]]], [73, 73]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49162]]], [102, None, 137]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 148], ['r', 24576], ['r', 24577]]], [None, 148, 148]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])]]\nfor label, args, expected in fixtures[N-1]:\n    check(label, solve(*args), expected)\nprint(json.dumps({\"observations\": observations, \"passed\": all(x[\"passed\"] for x in observations)}, ensure_ascii=False))\nraise SystemExit(0 if all(x[\"passed\"] for x in observations) else 1)\n"},"broken":{"sha256":"f67b279c51a8f1b1f1161ae949e4295582b45aaeddc511a7859763df2778b75a","source":"\"\"\"Failure Map reference implementation. Python standard library only.\"\"\"\nimport json\n\nN = 1\nobservations = []\ndef solve(*args):\n    rom_size, sram_en, ops = args\n    ram, ppu, io, sram = {}, {}, {}, {}\n    bus = 0\n    out = []\n    for op in ops:\n        kind, addr = op[0], op[1] & 0xFFFF\n        if addr < 0x2000: dev, key = ram, addr & 0x7FF\n        elif addr < 0x4000: dev, key = ppu, addr & 7\n        elif addr < 0x4018: dev, key = io, addr\n        elif addr < 0x6000: dev, key = None, None\n        elif addr < 0x8000: dev, key = (sram, addr - 0x6000) if sram_en else (None, None)\n        else: dev, key = 'rom', (addr - 0x8000) & 0x7FFF\n        if kind == 'w':\n            bus = op[2] & 0xFF\n            if dev is not None and dev != 'rom':\n                dev[key] = bus\n            out.append(None)\n        else:\n            if dev == 'rom': bus = (key * 7 + (key >> 8) + 3) & 0xFF\n            elif dev is not None: bus = dev.get(key, 0)\n            out.append(bus)\n    return out\ndef check(label, actual, expected):\n    observations.append({\"check\": label, \"actual\": actual, \"expected\": expected, \"passed\": actual == expected})\nfixtures = [[('ram mirrors', [32768, 1, [['w', 2049, 67], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 67, 67, 67]), ('video register mirrors', [32768, 1, [['w', 8201, 5], ['r', 16377], ['r', 8193]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 17], ['r', 16640]]], [None, 119, None, 17]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17665]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49158], ['r', 32774]]], [45, 45]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49158]]], [102, None, 109]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 152], ['r', 24576], ['r', 24577]]], [None, 152, 152]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 68], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 68, 68, 68]), ('video register mirrors', [32768, 1, [['w', 8202, 5], ['r', 16378], ['r', 8194]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 18], ['r', 16640]]], [None, 119, None, 18]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17666]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49159], ['r', 32775]]], [52, 52]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49159]]], [102, None, 116]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 151], ['r', 24576], ['r', 24577]]], [None, 151, 151]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 69], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 69, 69, 69]), ('video register mirrors', [32768, 1, [['w', 8203, 5], ['r', 16379], ['r', 8195]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 19], ['r', 16640]]], [None, 119, None, 19]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17667]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49160], ['r', 32776]]], [59, 59]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49160]]], [102, None, 123]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 150], ['r', 24576], ['r', 24577]]], [None, 150, 150]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 70], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 70, 70, 70]), ('video register mirrors', [32768, 1, [['w', 8204, 5], ['r', 16380], ['r', 8196]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 20], ['r', 16640]]], [None, 119, None, 20]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17668]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49161], ['r', 32777]]], [66, 66]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49161]]], [102, None, 130]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 149], ['r', 24576], ['r', 24577]]], [None, 149, 149]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 71], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 71, 71, 71]), ('video register mirrors', [32768, 1, [['w', 8205, 5], ['r', 16381], ['r', 8197]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 21], ['r', 16640]]], [None, 119, None, 21]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17669]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49162], ['r', 32778]]], [73, 73]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49162]]], [102, None, 137]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 148], ['r', 24576], ['r', 24577]]], [None, 148, 148]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])]]\nfor label, args, expected in fixtures[N-1]:\n    check(label, solve(*args), expected)\nprint(json.dumps({\"observations\": observations, \"passed\": all(x[\"passed\"] for x in observations)}, ensure_ascii=False))\nraise SystemExit(0 if all(x[\"passed\"] for x in observations) else 1)\n"},"fixed":{"sha256":"98b37d79126d3d78dc9ebed31b78a8e59b914727c242ce8373bd47a2f4d8a516","source":"\"\"\"Failure Map reference implementation. Python standard library only.\"\"\"\nimport json\n\nN = 1\nobservations = []\ndef solve(*args):\n    rom_size, sram_en, ops = args\n    ram, ppu, io, sram = {}, {}, {}, {}\n    bus = 0\n    out = []\n    for op in ops:\n        kind, addr = op[0], op[1] & 0xFFFF\n        if addr < 0x2000: dev, key = ram, addr & 0x7FF\n        elif addr < 0x4000: dev, key = ppu, addr & 7\n        elif addr < 0x4018: dev, key = io, addr\n        elif addr < 0x6000: dev, key = None, None\n        elif addr < 0x8000: dev, key = (sram, addr - 0x6000) if sram_en else (None, None)\n        else: dev, key = 'rom', (addr - 0x8000) % rom_size\n        if kind == 'w':\n            bus = op[2] & 0xFF\n            if dev is not None and dev != 'rom':\n                dev[key] = bus\n            out.append(None)\n        else:\n            if dev == 'rom': bus = (key * 7 + (key >> 8) + 3) & 0xFF\n            elif dev is not None: bus = dev.get(key, 0)\n            out.append(bus)\n    return out\ndef check(label, actual, expected):\n    observations.append({\"check\": label, \"actual\": actual, \"expected\": expected, \"passed\": actual == expected})\nfixtures = [[('ram mirrors', [32768, 1, [['w', 2049, 67], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 67, 67, 67]), ('video register mirrors', [32768, 1, [['w', 8201, 5], ['r', 16377], ['r', 8193]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 17], ['r', 16640]]], [None, 119, None, 17]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17665]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49158], ['r', 32774]]], [45, 45]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49158]]], [102, None, 109]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 152], ['r', 24576], ['r', 24577]]], [None, 152, 152]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 68], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 68, 68, 68]), ('video register mirrors', [32768, 1, [['w', 8202, 5], ['r', 16378], ['r', 8194]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 18], ['r', 16640]]], [None, 119, None, 18]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17666]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49159], ['r', 32775]]], [52, 52]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49159]]], [102, None, 116]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 151], ['r', 24576], ['r', 24577]]], [None, 151, 151]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 69], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 69, 69, 69]), ('video register mirrors', [32768, 1, [['w', 8203, 5], ['r', 16379], ['r', 8195]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 19], ['r', 16640]]], [None, 119, None, 19]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17667]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49160], ['r', 32776]]], [59, 59]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49160]]], [102, None, 123]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 150], ['r', 24576], ['r', 24577]]], [None, 150, 150]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 70], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 70, 70, 70]), ('video register mirrors', [32768, 1, [['w', 8204, 5], ['r', 16380], ['r', 8196]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 20], ['r', 16640]]], [None, 119, None, 20]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17668]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49161], ['r', 32777]]], [66, 66]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49161]]], [102, None, 130]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 149], ['r', 24576], ['r', 24577]]], [None, 149, 149]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])], [('ram mirrors', [32768, 1, [['w', 2049, 71], ['r', 1], ['r', 6145], ['r', 4097]]], [None, 71, 71, 71]), ('video register mirrors', [32768, 1, [['w', 8205, 5], ['r', 16381], ['r', 8197]]], [None, 5, 5]), ('open bus after unmapped write', [32768, 1, [['w', 16416, 119], ['r', 20480], ['w', 2, 21], ['r', 16640]]], [None, 119, None, 21]), ('open bus after read', [32768, 1, [['r', 32771], ['r', 17669]]], [24, 24]), ('small rom mirrors', [16384, 1, [['r', 49162], ['r', 32778]]], [73, 73]), ('large rom does not mirror', [32768, 0, [['r', 49157], ['w', 49157, 1], ['r', 49162]]], [102, None, 137]), ('io registers', [32768, 1, [['w', 16405, 15], ['r', 16405], ['r', 16406]]], [None, 15, 0]), ('disabled sram is open bus', [32768, 0, [['w', 28672, 148], ['r', 24576], ['r', 24577]]], [None, 148, 148]), ('enabled sram', [16384, 1, [['w', 28672, 18], ['r', 28672], ['r', 24576]]], [None, 18, 0])]]\nfor label, args, expected in fixtures[N-1]:\n    check(label, solve(*args), expected)\nprint(json.dumps({\"observations\": observations, \"passed\": all(x[\"passed\"] for x in observations)}, ensure_ascii=False))\nraise SystemExit(0 if all(x[\"passed\"] for x in observations) else 1)\n"}},"limitations":"A deterministic bounded teaching model of one emulator rule; the instruction semantics are a stipulated contract inspired by common ISAs and are not a claim of cycle-exact or architectural conformance. This reproducer isolates one failure mechanism. Results cover the supplied fixtures. Variants within a family share a test contract and should remain grouped when constructing evaluation splits. Related mechanisms with a shared evaluation_group must also remain together; these controlled models are not independent production incidents.","method":"Deterministic executable model with adversarial boundary fixtures.","provenance":{"created_by":"Failure Map","dependencies":"Python standard library","family":"w2-instruction-set-emulation-bus-decode-rom-mirroring","generated_at":"2026-09-29T14:51:21.101061+00:00","license":"CC0-1.0","python":"3.12.14","seed":1,"split":"open-access"},"relevance":"Console and microcontroller emulators depend on exact address decoding; mirroring and open-bus behaviour are relied on by real software.","repair":"Reduce the ROM offset modulo rom_size.","root_cause":"ROM offsets are not reduced modulo the ROM size.","sha256":"4bd656375354d4bd5f84fba90d245b90186bcca49a54bd2c7f908ab584239617","title":"16 KiB ROM not mirrored into the upper window · case 01","variant":1,"variant_policy":"Five numbered records share a model and may reuse boundary fixtures.","verification":{"attempt":{"elapsed_ms":39.969,"exit_code":1,"observations":[{"actual":[null,67,67,67],"check":"ram mirrors","expected":[null,67,67,67],"passed":true},{"actual":[null,5,5],"check":"video register mirrors","expected":[null,5,5],"passed":true},{"actual":[null,119,null,17],"check":"open bus after unmapped write","expected":[null,119,null,17],"passed":true},{"actual":[24,24],"check":"open bus after read","expected":[24,24],"passed":true},{"actual":[45,45],"check":"small rom mirrors","expected":[45,45],"passed":true},{"actual":[38,null,45],"check":"large rom does not mirror","expected":[102,null,109],"passed":false},{"actual":[null,15,0],"check":"io registers","expected":[null,15,0],"passed":true},{"actual":[null,152,152],"check":"disabled sram is open bus","expected":[null,152,152],"passed":true},{"actual":[null,18,0],"check":"enabled sram","expected":[null,18,0],"passed":true}],"passed":false,"stderr":"","stdout":"{\"observations\": [{\"check\": \"ram mirrors\", \"actual\": [null, 67, 67, 67], \"expected\": [null, 67, 67, 67], \"passed\": true}, {\"check\": \"video register mirrors\", \"actual\": [null, 5, 5], \"expected\": [null, 5, 5], \"passed\": true}, {\"check\": \"open bus after unmapped write\", \"actual\": [null, 119, null, 17], \"expected\": [null, 119, null, 17], \"passed\": true}, {\"check\": \"open bus after read\", \"actual\": [24, 24], \"expected\": [24, 24], \"passed\": true}, {\"check\": \"small rom mirrors\", \"actual\": [45, 45], \"expected\": [45, 45], \"passed\": true}, {\"check\": \"large rom does not mirror\", \"actual\": [38, null, 45], \"expected\": [102, null, 109], \"passed\": false}, {\"check\": \"io registers\", \"actual\": [null, 15, 0], \"expected\": [null, 15, 0], \"passed\": true}, {\"check\": \"disabled sram is open bus\", \"actual\": [null, 152, 152], \"expected\": [null, 152, 152], \"passed\": true}, {\"check\": \"enabled sram\", \"actual\": [null, 18, 0], \"expected\": [null, 18, 0], \"passed\": true}], \"passed\": false}\n"},"broken":{"elapsed_ms":41.221,"exit_code":1,"observations":[{"actual":[null,67,67,67],"check":"ram mirrors","expected":[null,67,67,67],"passed":true},{"actual":[null,5,5],"check":"video register mirrors","expected":[null,5,5],"passed":true},{"actual":[null,119,null,17],"check":"open bus after unmapped write","expected":[null,119,null,17],"passed":true},{"actual":[24,24],"check":"open bus after read","expected":[24,24],"passed":true},{"actual":[109,45],"check":"small rom mirrors","expected":[45,45],"passed":false},{"actual":[102,null,109],"check":"large rom does not mirror","expected":[102,null,109],"passed":true},{"actual":[null,15,0],"check":"io registers","expected":[null,15,0],"passed":true},{"actual":[null,152,152],"check":"disabled sram is open bus","expected":[null,152,152],"passed":true},{"actual":[null,18,0],"check":"enabled sram","expected":[null,18,0],"passed":true}],"passed":false,"stderr":"","stdout":"{\"observations\": [{\"check\": \"ram mirrors\", \"actual\": [null, 67, 67, 67], \"expected\": [null, 67, 67, 67], \"passed\": true}, {\"check\": \"video register mirrors\", \"actual\": [null, 5, 5], \"expected\": [null, 5, 5], \"passed\": true}, {\"check\": \"open bus after unmapped write\", \"actual\": [null, 119, null, 17], \"expected\": [null, 119, null, 17], \"passed\": true}, {\"check\": \"open bus after read\", \"actual\": [24, 24], \"expected\": [24, 24], \"passed\": true}, {\"check\": \"small rom mirrors\", \"actual\": [109, 45], \"expected\": [45, 45], \"passed\": false}, {\"check\": \"large rom does not mirror\", \"actual\": [102, null, 109], \"expected\": [102, null, 109], \"passed\": true}, {\"check\": \"io registers\", \"actual\": [null, 15, 0], \"expected\": [null, 15, 0], \"passed\": true}, {\"check\": \"disabled sram is open bus\", \"actual\": [null, 152, 152], \"expected\": [null, 152, 152], \"passed\": true}, {\"check\": \"enabled sram\", \"actual\": [null, 18, 0], \"expected\": [null, 18, 0], \"passed\": true}], \"passed\": false}\n"},"fixed":{"elapsed_ms":41.676,"exit_code":0,"observations":[{"actual":[null,67,67,67],"check":"ram mirrors","expected":[null,67,67,67],"passed":true},{"actual":[null,5,5],"check":"video register mirrors","expected":[null,5,5],"passed":true},{"actual":[null,119,null,17],"check":"open bus after unmapped write","expected":[null,119,null,17],"passed":true},{"actual":[24,24],"check":"open bus after read","expected":[24,24],"passed":true},{"actual":[45,45],"check":"small rom mirrors","expected":[45,45],"passed":true},{"actual":[102,null,109],"check":"large rom does not mirror","expected":[102,null,109],"passed":true},{"actual":[null,15,0],"check":"io registers","expected":[null,15,0],"passed":true},{"actual":[null,152,152],"check":"disabled sram is open bus","expected":[null,152,152],"passed":true},{"actual":[null,18,0],"check":"enabled sram","expected":[null,18,0],"passed":true}],"passed":true,"stderr":"","stdout":"{\"observations\": [{\"check\": \"ram mirrors\", \"actual\": [null, 67, 67, 67], \"expected\": [null, 67, 67, 67], \"passed\": true}, {\"check\": \"video register mirrors\", \"actual\": [null, 5, 5], \"expected\": [null, 5, 5], \"passed\": true}, {\"check\": \"open bus after unmapped write\", \"actual\": [null, 119, null, 17], \"expected\": [null, 119, null, 17], \"passed\": true}, {\"check\": \"open bus after read\", \"actual\": [24, 24], \"expected\": [24, 24], \"passed\": true}, {\"check\": \"small rom mirrors\", \"actual\": [45, 45], \"expected\": [45, 45], \"passed\": true}, {\"check\": \"large rom does not mirror\", \"actual\": [102, null, 109], \"expected\": [102, null, 109], \"passed\": true}, {\"check\": \"io registers\", \"actual\": [null, 15, 0], \"expected\": [null, 15, 0], \"passed\": true}, {\"check\": \"disabled sram is open bus\", \"actual\": [null, 152, 152], \"expected\": [null, 152, 152], \"passed\": true}, {\"check\": \"enabled sram\", \"actual\": [null, 18, 0], \"expected\": [null, 18, 0], \"passed\": true}], \"passed\": true}\n"}},"verified":true,"visibility":"public"}