{"abstract":"With two non-blocking writes to one register, the earlier write sticks.","category":"Digital logic simulation","checks":6,"contract":"Input [regs, stmts, cycles]. Each clock step executes stmts [kind, lhs, op, a, b] in order (ops copy/inv/and/xor on 0/1). Blocking ('b') statements update the working state immediately; non-blocking ('nb') statements evaluate their right side at the statement against the working state and queue the update. After all statements, queued updates apply in statement order (last write wins). Every variable, blocking or not, keeps its value into the next step. Return per-step values sorted by variable name.","contract_signature":"*args","evaluation_group":"w2-digital-logic-simulation-nonblocking-scheduler","failed_approach":"Sorting the queue by name and value makes the winner depend on the value, not the order.","family":"w2-digital-logic-simulation-nonblocking-scheduler-queued-update-order","id":"FA-89046","implementations":{"attempt":{"sha256":"0569c5f9dc82876edf03fbb49e060075ff59ddfd7c3d6959fbed134e0365fde7","source":"\"\"\"Failure Map reference implementation. Python standard library only.\"\"\"\nimport json\n\nN = 1\nobservations = []\ndef solve(*args):\n    regs, stmts, cycles = args\n    regs = dict(regs)\n    hist = []\n    def ev(op, a, b, env):\n        if op == 'copy': return env[a]\n        if op == 'inv': return 1 - env[a]\n        if op == 'and': return env[a] & env[b]\n        return env[a] ^ env[b]\n    for _ in range(cycles):\n        cur = dict(regs)\n        nba = []\n        for kind, lhs, op, a, b in stmts:\n            v = ev(op, a, b, cur)\n            if kind == 'b':\n                cur[lhs] = v\n            else:\n                nba.append((lhs, v))\n        for lhs, v in sorted(nba):\n            cur[lhs] = v\n        regs = cur\n        hist.append([regs[k] for k in sorted(regs)])\n    return hist\ndef check(label, actual, expected):\n    observations.append({\"check\": label, \"actual\": actual, \"expected\": expected, \"passed\": actual == expected})\nfixtures = [[('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 1], [[0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 2], [[0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 2], [[0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 3], [[0, 1, 0], [1, 0, 1], [1, 1, 0]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 1], [[0, 1, 1, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 2], [[0, 1], [1, 0]]), ('blocking chain inside one step', [{'a': 0, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[1, 1, 1], [0, 0, 0]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 3], [[0, 0], [1, 1], [0, 0]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 3], [[0, 1], [1, 0], [0, 1]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 4], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 2], [[0, 1, 1, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 3], [[0, 1], [1, 0], [0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 4], [[0, 0], [1, 1], [0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 4], [[0, 1], [1, 0], [0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 5], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 3], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 4], [[0, 1], [1, 0], [0, 1], [1, 0]]), ('blocking chain inside one step', [{'a': 0, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[1, 1, 1], [0, 0, 0]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 5], [[0, 0], [1, 1], [0, 0], [1, 1], [0, 0]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 5], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 6], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1], [0, 0, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 4], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 5], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 6], [[0, 0], [1, 1], [0, 0], [1, 1], [0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 6], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 7], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1], [0, 0, 1], [1, 0, 0]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 5], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1]])]]\nfor label, args, expected in fixtures[N-1]:\n    check(label, solve(*args), expected)\nprint(json.dumps({\"observations\": observations, \"passed\": all(x[\"passed\"] for x in observations)}, ensure_ascii=False))\nraise SystemExit(0 if all(x[\"passed\"] for x in observations) else 1)\n"},"broken":{"sha256":"29bc9c5cf433d7760efb9b7ff6c9af29b88a2eb175b0e93c16e072c8c482067d","source":"\"\"\"Failure Map reference implementation. Python standard library only.\"\"\"\nimport json\n\nN = 1\nobservations = []\ndef solve(*args):\n    regs, stmts, cycles = args\n    regs = dict(regs)\n    hist = []\n    def ev(op, a, b, env):\n        if op == 'copy': return env[a]\n        if op == 'inv': return 1 - env[a]\n        if op == 'and': return env[a] & env[b]\n        return env[a] ^ env[b]\n    for _ in range(cycles):\n        cur = dict(regs)\n        nba = []\n        for kind, lhs, op, a, b in stmts:\n            v = ev(op, a, b, cur)\n            if kind == 'b':\n                cur[lhs] = v\n            else:\n                nba.append((lhs, v))\n        for lhs, v in reversed(nba):\n            cur[lhs] = v\n        regs = cur\n        hist.append([regs[k] for k in sorted(regs)])\n    return hist\ndef check(label, actual, expected):\n    observations.append({\"check\": label, \"actual\": actual, \"expected\": expected, \"passed\": actual == expected})\nfixtures = [[('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 1], [[0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 2], [[0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 2], [[0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 3], [[0, 1, 0], [1, 0, 1], [1, 1, 0]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 1], [[0, 1, 1, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 2], [[0, 1], [1, 0]]), ('blocking chain inside one step', [{'a': 0, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[1, 1, 1], [0, 0, 0]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 3], [[0, 0], [1, 1], [0, 0]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 3], [[0, 1], [1, 0], [0, 1]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 4], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 2], [[0, 1, 1, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 3], [[0, 1], [1, 0], [0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 4], [[0, 0], [1, 1], [0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 4], [[0, 1], [1, 0], [0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 5], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 3], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 4], [[0, 1], [1, 0], [0, 1], [1, 0]]), ('blocking chain inside one step', [{'a': 0, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[1, 1, 1], [0, 0, 0]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 5], [[0, 0], [1, 1], [0, 0], [1, 1], [0, 0]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 5], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 6], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1], [0, 0, 1]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 4], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1]])], [('non-blocking swap', [{'a': 1, 'b': 0}, [['nb', 'a', 'copy', 'b', None], ['nb', 'b', 'copy', 'a', None]], 5], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1]]), ('blocking chain inside one step', [{'a': 1, 't': 0, 'u': 0}, [['b', 't', 'inv', 'a', None], ['b', 'u', 'copy', 't', None], ['nb', 'a', 'copy', 'u', None]], 2], [[0, 0, 0], [1, 1, 1]]), ('later non-blocking write wins', [{'a': 1, 'c': 0}, [['nb', 'c', 'copy', 'a', None], ['nb', 'c', 'inv', 'a', None], ['nb', 'a', 'inv', 'a', None]], 6], [[0, 0], [1, 1], [0, 0], [1, 1], [0, 0], [1, 1]]), ('blocking temp persists across cycles', [{'t': 0, 'c': 0}, [['nb', 'c', 'copy', 't', None], ['b', 't', 'inv', 't', None]], 6], [[0, 1], [1, 0], [0, 1], [1, 0], [0, 1], [1, 0]]), ('shift register with non-blocking', [{'s0': 1, 's1': 0, 's2': 0}, [['nb', 's1', 'copy', 's0', None], ['nb', 's2', 'copy', 's1', None], ['nb', 's0', 'xor', 's2', 's1']], 7], [[0, 1, 0], [1, 0, 1], [1, 1, 0], [1, 1, 1], [0, 1, 1], [0, 0, 1], [1, 0, 0]]), ('non-blocking reads blocking result', [{'a': 1, 'b': 1, 'y': 0, 'm': 0}, [['b', 'm', 'and', 'a', 'b'], ['nb', 'y', 'xor', 'm', 'y'], ['nb', 'a', 'inv', 'b', None]], 5], [[0, 1, 1, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1], [0, 1, 0, 1]])]]\nfor label, args, expected in fixtures[N-1]:\n    check(label, solve(*args), expected)\nprint(json.dumps({\"observations\": observations, \"passed\": all(x[\"passed\"] for x in observations)}, ensure_ascii=False))\nraise SystemExit(0 if all(x[\"passed\"] for x in observations) else 1)\n"}},"limitations":"A deterministic bounded teaching model of one simulator rule set; the contract is stipulated and is not a claim of conformance to any HDL standard or commercial simulator. This reproducer isolates one failure mechanism. Results cover the supplied fixtures. Variants within a family share a test contract and should remain grouped when constructing evaluation splits. Related mechanisms with a shared evaluation_group must also remain together; these controlled models are not independent production incidents.","method":"Deterministic executable model with adversarial boundary fixtures.","provenance":{"created_by":"Failure Map","dependencies":"Python standard library","family":"w2-digital-logic-simulation-nonblocking-scheduler-queued-update-order","generated_at":"2026-09-29T14:51:13.961836+00:00","license":"CC0-1.0","python":"3.12.14","seed":1,"split":"open-access"},"relevance":"Event-driven RTL simulation depends on the active/NBA region split; mis-scheduling produces races that do not exist in hardware.","root_cause":"Queued updates are applied in reverse statement order.","sha256":"73e6f6257009c90068a9a7241a36b50061a98dadefb16ec9cf671c77f7ac03af","title":"First queued non-blocking write wins · case 01","variant":1,"variant_policy":"Five numbered records share a model and may reuse boundary fixtures.","verified":true,"visibility":"public","verification":{"attempt":{"elapsed_ms":39.039,"exit_code":1,"observations":[{"actual":[[0,1]],"check":"non-blocking swap","expected":[[0,1]],"passed":true},{"actual":[[0,0,0],[1,1,1]],"check":"blocking chain inside one step","expected":[[0,0,0],[1,1,1]],"passed":true},{"actual":[[0,1],[1,1]],"check":"later non-blocking write wins","expected":[[0,0],[1,1]],"passed":false},{"actual":[[0,1],[1,0]],"check":"blocking temp persists across cycles","expected":[[0,1],[1,0]],"passed":true},{"actual":[[0,1,0],[1,0,1],[1,1,0]],"check":"shift register with non-blocking","expected":[[0,1,0],[1,0,1],[1,1,0]],"passed":true},{"actual":[[0,1,1,1]],"check":"non-blocking reads blocking result","expected":[[0,1,1,1]],"passed":true}],"passed":false,"stderr":"","stdout":"{\"observations\": [{\"check\": \"non-blocking swap\", \"actual\": [[0, 1]], \"expected\": [[0, 1]], \"passed\": true}, {\"check\": \"blocking chain inside one step\", \"actual\": [[0, 0, 0], [1, 1, 1]], \"expected\": [[0, 0, 0], [1, 1, 1]], \"passed\": true}, {\"check\": \"later non-blocking write wins\", \"actual\": [[0, 1], [1, 1]], \"expected\": [[0, 0], [1, 1]], \"passed\": false}, {\"check\": \"blocking temp persists across cycles\", \"actual\": [[0, 1], [1, 0]], \"expected\": [[0, 1], [1, 0]], \"passed\": true}, {\"check\": \"shift register with non-blocking\", \"actual\": [[0, 1, 0], [1, 0, 1], [1, 1, 0]], \"expected\": [[0, 1, 0], [1, 0, 1], [1, 1, 0]], \"passed\": true}, {\"check\": \"non-blocking reads blocking result\", \"actual\": [[0, 1, 1, 1]], \"expected\": [[0, 1, 1, 1]], \"passed\": true}], \"passed\": false}\n"},"broken":{"elapsed_ms":39.303,"exit_code":1,"observations":[{"actual":[[0,1]],"check":"non-blocking swap","expected":[[0,1]],"passed":true},{"actual":[[0,0,0],[1,1,1]],"check":"blocking chain inside one step","expected":[[0,0,0],[1,1,1]],"passed":true},{"actual":[[0,1],[1,0]],"check":"later non-blocking write wins","expected":[[0,0],[1,1]],"passed":false},{"actual":[[0,1],[1,0]],"check":"blocking temp persists across cycles","expected":[[0,1],[1,0]],"passed":true},{"actual":[[0,1,0],[1,0,1],[1,1,0]],"check":"shift register with non-blocking","expected":[[0,1,0],[1,0,1],[1,1,0]],"passed":true},{"actual":[[0,1,1,1]],"check":"non-blocking reads blocking result","expected":[[0,1,1,1]],"passed":true}],"passed":false,"stderr":"","stdout":"{\"observations\": [{\"check\": \"non-blocking swap\", \"actual\": [[0, 1]], \"expected\": [[0, 1]], \"passed\": true}, {\"check\": \"blocking chain inside one step\", \"actual\": [[0, 0, 0], [1, 1, 1]], \"expected\": [[0, 0, 0], [1, 1, 1]], \"passed\": true}, {\"check\": \"later non-blocking write wins\", \"actual\": [[0, 1], [1, 0]], \"expected\": [[0, 0], [1, 1]], \"passed\": false}, {\"check\": \"blocking temp persists across cycles\", \"actual\": [[0, 1], [1, 0]], \"expected\": [[0, 1], [1, 0]], \"passed\": true}, {\"check\": \"shift register with non-blocking\", \"actual\": [[0, 1, 0], [1, 0, 1], [1, 1, 0]], \"expected\": [[0, 1, 0], [1, 0, 1], [1, 1, 0]], \"passed\": true}, {\"check\": \"non-blocking reads blocking result\", \"actual\": [[0, 1, 1, 1]], \"expected\": [[0, 1, 1, 1]], \"passed\": true}], \"passed\": false}\n"}},"member_only":{"stages":["fixed"],"fields":["implementations.fixed","verification.fixed","harness","repair"],"note":"The verified repair, its recorded checks, the repair description, and the scoring harness are available to members."}}